CV

You can also find the pdf copy of my CV here.

Education

• Ph.D in Computer Engineering, University of Florida, 2023
• M.S. in Computer Engineering, University of California, Riverside, 2018
• B.S. in Electrical and Electronic Engineering, Bangladesh University of Engineering and Technology, 2011

Work experience

Post-Doctoral Associate
FICS Research, Department of Electrical and Computer Engineering, University of Florida
August 2023 – Present
Gainesville, FL, USA
Advisors: Dr. Mark Tehranipoor, Dr. Farimah Farahmandi

• Supervise Ph.D. students across multiple research projects.
• Write and contribute to research proposals for future funding opportunities.
• Organize technical seminars and workshops.
• Coordinate and collaborate with academic and industry research partners.

Graduate Research Assistant
Department of Electrical and Computer Engineering, University of Florida
May 2018 – August 2023
Gainesville, FL, USA
Advisor: Dr. Christophe Bobda

• Conducted research on secure integration of SoC IPs, focusing on hardware-level isolation techniques and runtime monitoring architectures for FPGA-based SoCs.
• Contributed significantly to the DARPA AISS program, NSF Cloud FPGA Security project, and AFRL-funded hardware access control initiative.
• Developed design specifications, implemented FPGA prototypes, and performed experimental evaluations.
• Authored peer-reviewed research articles and presented findings at leading international conferences.

Technical Intern, Solution R&D Group
Synopsys Inc.
June 2022 – November 2022
Sunnyvale, CA, USA

• Developed provisioning firmware for watermarked IP within the Security Engine Subsystem for the DARPA AISS project.
• Designed and implemented a Mailbox IP for inter-processor communication and validated it on the Zynq SoC platform.

Design Engineering Intern, DFX Silicon Design
Xilinx Inc. (now AMD Xilinx)
June 2021 – December 2021
San Jose, CA, USA

• Developed software tools in Perl to automate debugging and testing workflows for Xilinx FPGA devices.

Talks and Demo

• Lasp: LLM Assisted Security Property Generation for SoC Verification
  Avinash Ayalasomayajula, Rui Guo, Jingbo Zhou, Sujan Kumar Saha, Farimah Farahmandi
  Oral presentation, International Symposium on Machine Learning for CAD (MLCAD), 2024

• A Hardware Software Framework for System on FPGA Security
  Sujan Kumar Saha, Christophe Bobda
  Oral presentation, Security for Custom Computing Machine (SCCM) Workshop, 2023

• Metrics for Assessing Security of System on Chip
  Sujan Kumar Saha, Joel Mandebi Mbongue, Christophe Bobda
  Open poster, IEEE International Symposium on Hardware Oriented Security and Trust (HOST), 2022

• System Level Design of Secure System on Chips
  Sujan Kumar Saha, Christophe Bobda
  Open demo, Technical Demo Conference (TDC), 2021, Florida Institute of Cybersecurity (FICS)

• MeXT SE A Design Tool to Generate Secure MPSoCs
  Md Jubaer Hossain Pantho, Sujan Kumar Saha, Christophe Bobda
  Open demo, IEEE International Symposium on Hardware Oriented Security and Trust (HOST), 2020

• FPGA Accelerated Embedded System Security Through Hardware Isolation
  Sujan Kumar Saha, Christophe Bobda
  Oral presentation, Asian Hardware Oriented Security and Trust (AsianHOST), 2020
  Open poster, Annual Warren B Nems IoT Conference, 2019, University of Florida